sBubshait
|
17d31a74e3
|
Add a working Makefile for testing purposes
|
2024-06-11 23:49:40 +01:00 |
|
sBubshait
|
850f3cf4f7
|
Add overall assemble structure
|
2024-06-11 23:46:40 +01:00 |
|
sBubshait
|
999f36facd
|
Fix bugs to make code compile. Code now compiles
|
2024-06-11 23:19:04 +01:00 |
|
sBubshait
|
31c1ae90f7
|
Attempt to make code compile, fix syntax errors
|
2024-06-11 23:13:23 +01:00 |
|
sBubshait
|
efaed431d0
|
Added all instruction in subfolder a64instruction
|
2024-06-11 23:02:26 +01:00 |
|
EDiasAlberto
|
62ff6e9e02
|
fix syntax errors in fileio.c
|
2024-06-11 21:23:26 +01:00 |
|
EDiasAlberto
|
647f47e39d
|
rewrite fileio to load file into memory
|
2024-06-11 21:16:47 +01:00 |
|
EDiasAlberto
|
173bdf08ec
|
fix incorrect fileio.c
|
2024-06-11 20:23:00 +01:00 |
|
EDiasAlberto
|
6153db7737
|
fix compile issues git add . :)
|
2024-06-11 17:35:23 +01:00 |
|
EDiasAlberto
|
92719b6b33
|
comments for clarity in parser
|
2024-06-09 23:10:39 +01:00 |
|
EDiasAlberto
|
d0be871e8f
|
generate offset operand for load literal with immediate value
|
2024-06-09 23:07:45 +01:00 |
|
EDiasAlberto
|
44bb327b7d
|
begin formulating parser pipeline
|
2024-06-09 22:54:27 +01:00 |
|
EDiasAlberto
|
4098ea5a5f
|
calculate offsets for different store instructions
|
2024-06-09 22:43:37 +01:00 |
|
EDiasAlberto
|
04dda33987
|
calculate base register from input
|
2024-06-09 22:21:30 +01:00 |
|
EDiasAlberto
|
34060c3fad
|
fix hierarchy of struct access in parser
|
2024-06-06 17:54:35 +01:00 |
|
EDiasAlberto
|
1fa33798bf
|
rewrite DP classification logic
|
2024-06-06 17:38:54 +01:00 |
|
EDiasAlberto
|
f57e0a786f
|
rename assembler funcs for clarity
|
2024-06-06 17:14:56 +01:00 |
|
EDiasAlberto
|
225ade7770
|
fix use of cpp syntax
|
2024-06-06 17:10:18 +01:00 |
|
Dias Alberto, Ethan
|
9c6a459b23
|
Merge branch 'assembler' into 'assembler-e'
# Conflicts:
# src/twopassassembly.c
|
2024-06-06 16:03:18 +00:00 |
|
GDBWNV
|
da50ee27a1
|
added label, branch, halt, directive to switch statement
|
2024-06-06 16:40:24 +01:00 |
|
EDiasAlberto
|
5413d27026
|
adjust operand counts for calculating address format
|
2024-06-06 14:46:56 +01:00 |
|
EDiasAlberto
|
f1ac860d6a
|
rewrite address format calculation
as { is not in the actual asm syntax
|
2024-06-06 14:46:16 +01:00 |
|
EDiasAlberto
|
70e02768b6
|
fix struct access
|
2024-06-06 14:30:13 +01:00 |
|
EDiasAlberto
|
872d4224f8
|
classify register type and base register for load/store
|
2024-06-06 14:28:32 +01:00 |
|
EDiasAlberto
|
1011d7be71
|
classify load store addressing type
|
2024-06-06 14:14:10 +01:00 |
|
GDBWNV
|
1440ebd702
|
single data transfer & load literal
|
2024-06-06 13:34:14 +01:00 |
|
EDiasAlberto
|
b93ab76b82
|
generate branch struct from operands (INCOMPLETE)
|
2024-06-06 13:22:54 +01:00 |
|
EDiasAlberto
|
6177b2f748
|
assemble branch instructions
|
2024-06-06 13:01:26 +01:00 |
|
GDBWNV
|
09956c7b2e
|
data processing register
|
2024-06-06 13:00:27 +01:00 |
|
GDBWNV
|
ce34f27fbd
|
data processing immediate
|
2024-06-06 12:33:09 +01:00 |
|
GDBWNV
|
b362f46d58
|
Merge remote-tracking branch 'origin/emulator' into Assembler-G
|
2024-06-06 10:11:57 +01:00 |
|
sBubshait
|
d73111515e
|
Fix Overflow handling in Subtraction DP Register, w/ T
|
2024-06-06 00:47:06 +01:00 |
|
Themis Demetriades
|
95c74964b3
|
Fix movk to not overwrite entire register for large scalars w/ S
|
2024-06-06 00:35:48 +01:00 |
|
sBubshait
|
7b1e6314a7
|
Fix Subs handling of carry PSTATE condition code, w/ T
|
2024-06-05 23:58:56 +01:00 |
|
Themis Demetriades
|
40c5fac9f6
|
Fixed bug with movk overwriting wrong bits w/ S
|
2024-06-05 23:43:36 +01:00 |
|
sBubshait
|
a3dd809437
|
Update execute, implemented the store instrs, w/ T
|
2024-06-05 23:30:20 +01:00 |
|
Themis Demetriades
|
75a8d79bb4
|
Changed order of operations for DPR logic instructions w/ S
|
2024-06-05 23:19:53 +01:00 |
|
Themis Demetriades
|
dd472117aa
|
Add negation for second operand in DPR instructions w/ S
|
2024-06-05 22:50:04 +01:00 |
|
Themis Demetriades
|
cc62168d43
|
Remove debugging code w/ S
|
2024-06-05 22:23:51 +01:00 |
|
Themis Demetriades
|
294b03ddde
|
Added ability to write to zero register (discard) w/ S
|
2024-06-05 22:21:32 +01:00 |
|
sBubshait
|
14fbb7e4fc
|
Fix Bug: Struct was not being changed because it wasn't a ptr, w/ T
|
2024-06-05 21:31:41 +01:00 |
|
sBubshait
|
5bb7d86156
|
Fix syntax, add new line in end of file and # before include, w/ T
|
2024-06-05 21:30:41 +01:00 |
|
sBubshait
|
b3ccee44bb
|
Change enum values in DP Register to match the spec, w/ T
|
2024-06-05 21:23:52 +01:00 |
|
EDiasAlberto
|
262fd6219d
|
conditional definition of parser constants
|
2024-06-05 21:10:31 +01:00 |
|
EDiasAlberto
|
bb0f939539
|
construct instr IR from label
|
2024-06-05 21:07:28 +01:00 |
|
EDiasAlberto
|
8931c151f8
|
removed duped if statement
|
2024-06-05 21:02:25 +01:00 |
|
EDiasAlberto
|
f28d3b4047
|
removed alias function temporarily
|
2024-06-05 21:01:39 +01:00 |
|
Themis Demetriades
|
120b492a48
|
Added structs to represent labels and directives for assembler
|
2024-06-05 20:54:22 +01:00 |
|
EDiasAlberto
|
48efdf8284
|
classify directprocessing instruction type
|
2024-06-05 20:53:56 +01:00 |
|
sBubshait
|
379dedc6ce
|
Add execution of Multiply DP Register Instructions, w/ T
|
2024-06-05 20:25:47 +01:00 |
|
sBubshait
|
9ea494acfc
|
Fix branch enum numbering to match the spec, w/ T
|
2024-06-05 20:14:12 +01:00 |
|
Themis Demetriades
|
024044afc7
|
Add decode and execute structure for DPI instructions w/ S
|
2024-06-05 20:11:56 +01:00 |
|
Dias Alberto, Ethan
|
4df768f327
|
Merge branch 'assembler' into 'assembler-e'
# Conflicts:
# src/parser.c
|
2024-06-05 19:01:15 +00:00 |
|
Themis Demetriades
|
8b0bb1888b
|
Changed constant name for 64 bit register type w/ S
|
2024-06-05 20:00:25 +01:00 |
|
EDiasAlberto
|
1d1089634f
|
add halt command handling
|
2024-06-05 19:57:51 +01:00 |
|
EDiasAlberto
|
129bdf3954
|
classify opcode load/store
|
2024-06-05 19:57:51 +01:00 |
|
GDBWNV
|
07ff159c9b
|
Merge remote-tracking branch 'origin/assembler' into Assembler-G
|
2024-06-05 19:26:02 +01:00 |
|
Themis Demetriades
|
93031e82e0
|
Complete decode for DPR instructions and complete their IR
|
2024-06-05 16:38:13 +01:00 |
|
Themis Demetriades
|
ff25680455
|
Update names of decode SDT constants to follow style
|
2024-06-05 14:00:49 +01:00 |
|
Themis Demetriades
|
2402e3d268
|
Update DPR type instruction IR operand field name
|
2024-06-04 15:41:58 +01:00 |
|
Themis Demetriades
|
bb6fa95ade
|
Add DPR type instruction data to IR of a64 instructions
|
2024-06-04 15:09:53 +01:00 |
|
EDiasAlberto
|
0f04ac9e22
|
rename fileaccess
|
2024-06-04 14:53:30 +01:00 |
|
GDBWNV
|
67a9c39832
|
Symbol basic functionality.
|
2024-06-04 14:02:09 +01:00 |
|
Themis Demetriades
|
d6b551c190
|
Fix function that updates N and Z flags of processor w/ S
|
2024-06-04 13:24:31 +01:00 |
|
EDiasAlberto
|
a8a1fd52a9
|
add to twopassassembly skeleton
|
2024-06-04 04:31:46 +01:00 |
|
EDiasAlberto
|
ce0f825e1d
|
add halt command handling
|
2024-06-04 04:24:56 +01:00 |
|
EDiasAlberto
|
13e2cc8c9d
|
classify branch type from opcode
|
2024-06-04 03:35:06 +01:00 |
|
EDiasAlberto
|
bb3218b535
|
add detail to assembly skeleton
|
2024-06-04 03:07:00 +01:00 |
|
EDiasAlberto
|
422b0f3e62
|
start classifying opcodes and writing skeleton for twopass assembly
|
2024-06-04 01:30:17 +01:00 |
|
EDiasAlberto
|
cadac4e1bb
|
rename parser funcs for clarity
|
2024-06-03 23:09:40 +01:00 |
|
EDiasAlberto
|
036e163fe8
|
classify asm line type, tokenise operands
|
2024-06-03 23:07:31 +01:00 |
|
sBubshait
|
c6574b72f8
|
Fix Bug In Unsigned Offset SDT, multiply correctly, w/ T
|
2024-06-03 22:40:31 +01:00 |
|
Themis Demetriades
|
efc8c087f9
|
Fixed bug with size of immediate values for emulator w/ S
|
2024-06-03 22:37:58 +01:00 |
|
sBubshait
|
be6b0cf429
|
Fix Bug in Print.c to print Hex instead of decimal, w/ T
|
2024-06-03 22:33:40 +01:00 |
|
sBubshait
|
d290201004
|
Fix print bug, fix portability issue, w/ T
|
2024-06-03 22:30:07 +01:00 |
|
sBubshait
|
d9562521ca
|
Fix print format bug, it used to only print lower 32 bits, w/ T
|
2024-06-03 22:13:46 +01:00 |
|
EDiasAlberto
|
ba1b614fc1
|
comment code for understanding
|
2024-06-03 22:02:41 +01:00 |
|
sBubshait
|
900091f798
|
Fix getBits Bug when wanted bit is last bit, w/ T
|
2024-06-03 21:47:14 +01:00 |
|
EDiasAlberto
|
43dd6be707
|
add a64instruction structs from emulator
|
2024-06-03 21:46:22 +01:00 |
|
GDBWNV
|
d69d3f0d88
|
Requested upload to ensure no repeated code
|
2024-06-03 21:38:58 +01:00 |
|
EDiasAlberto
|
1ff18a4fb9
|
rewrite error exits for consistency
|
2024-06-03 21:23:18 +01:00 |
|
Themis Demetriades
|
b19649192a
|
Fix bug with execute immediate value not being shifted w/ S
|
2024-06-03 20:49:21 +01:00 |
|
Themis Demetriades
|
5afcb8ef63
|
Fix redeclaration of variable in execute w/ S
|
2024-06-03 20:40:05 +01:00 |
|
sBubshait
|
20557a14eb
|
Fix emulate so not increment PC if branch inst, w/ T
|
2024-06-03 20:34:14 +01:00 |
|
Themis Demetriades
|
851a54a51e
|
Complete DPI execute function w/ S
|
2024-06-03 19:35:21 +01:00 |
|
Themis Demetriades
|
d9276899e4
|
Fixed register print representation and condition func check w/ S
|
2024-06-03 18:14:04 +01:00 |
|
sBubshait
|
5fd5c512e6
|
Fix emulate to properly initialise state, w/ T
|
2024-06-03 17:55:54 +01:00 |
|
sBubshait
|
3a20190f4f
|
Add new line in end of files, w/ T
|
2024-06-03 17:45:07 +01:00 |
|
sBubshait
|
9c299b3be0
|
Add execute branch instruction, w/ T
|
2024-06-03 17:43:21 +01:00 |
|
Themis Demetriades
|
84586b4768
|
Add function for executing DPI arithm instructions w/ S
|
2024-06-03 17:38:04 +01:00 |
|
Themis Demetriades
|
679c84a075
|
Moved WORD_BITS constant to global header w/ S
|
2024-06-03 17:36:19 +01:00 |
|
Themis Demetriades
|
4c04f44286
|
Fixed endian-ness of readWord functions w/ S
|
2024-06-03 17:29:45 +01:00 |
|
Themis Demetriades
|
8b98a0002f
|
Removed repeated definition of WORD_BITS w/ S
|
2024-06-03 16:17:15 +01:00 |
|
sBubshait
|
736122276b
|
Update print to account for unsigned int, w/ T
|
2024-06-03 16:14:41 +01:00 |
|
sBubshait
|
14733b9660
|
Add execute for SDT instructions, w/ T
|
2024-06-03 14:47:50 +01:00 |
|
sBubshait
|
10d89ecf91
|
Add read double word utility, w/ T
|
2024-06-03 14:44:07 +01:00 |
|
Themis Demetriades
|
07b2410a86
|
Added zero register specifier constant w/ S
|
2024-06-03 14:38:37 +01:00 |
|
Themis Demetriades
|
63ba75fab6
|
Add function for executing DPI instructions w/ S
|
2024-06-03 14:37:59 +01:00 |
|
Themis Demetriades
|
34119916de
|
Added constant for number of bits in a dword w/ S
|
2024-06-03 14:37:08 +01:00 |
|
Themis Demetriades
|
9af558a831
|
Updated machine struct to simulate 64bit registers
|
2024-06-03 13:34:29 +01:00 |
|