Changed order of operations for DPR logic instructions w/ S
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@ -203,9 +203,6 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
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// Apply shift to value held in second register
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a64inst_DPRegister_ArithmLogicData *arithmLogicData = &inst->data.DPRegisterData.processOpData.arithmLogicData;
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uint8_t shiftAmount = arithmLogicData->shiftAmount;
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if (arithmLogicData->negShiftedSrc2) {
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src2Val = ~src2Val;
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}
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switch(arithmLogicData->shiftType) {
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case a64inst_LSL:
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@ -236,6 +233,11 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
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break;
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}
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// Negate second operand if negShiftedSrc2 flag is enabled
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if (arithmLogicData->negShiftedSrc2) {
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src2Val = truncateValue(~src2Val, regType);
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}
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dword result;
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switch(arithmLogicData->type) {
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