add detail to assembly skeleton
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@ -22,6 +22,7 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr){
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instr->type = a64inst_SINGLETRANSFER;
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} else {
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//data processing
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}
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}
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@ -52,12 +53,12 @@ a64inst_instruction *parser(char asmLine[]){
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char *opcode = strtok(stringptr, " ");
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char *operands = strtok(NULL, "");
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if(opcode[0]=="."){
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if(strcmp(opcode, ".int") == 0){
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//type is directive
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//define new type in a64instr struct
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} else if(opcode[strlen(opcode)-1]==":") {
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} else if(strcmp(opcode[strlen(opcode)-1], ":") == 0) {
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//type is label
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//use symbol table to assemble
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//add to symbol table
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} else {
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//type is instruction
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int operandCount = 0;
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@ -10,3 +10,31 @@ void generateSymbolTable(a64inst_instruction instrs[], int numInstrs){
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}
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}
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}
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word assembleBranch(a64inst_instruction *instr){
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word binInstr = 0;
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switch (instr->data.BranchData.BranchType)
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{
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case a64inst_UNCONDITIONAL:
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//000101
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//25-0: sign extended simm26
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break;
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case a64inst_REGISTER:
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//1101011
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//0000
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//11111
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//000000
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//9-5: address from register
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//0000
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break;
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case a64inst_CONDITIONAL:
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// 01010100
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// 25-5: sign extended offset
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// 4-0: 0{condition}
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break;
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default:
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break;
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}
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}
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