Changed order of operations for DPR logic instructions w/ S

This commit is contained in:
Themis Demetriades 2024-06-05 23:19:53 +01:00
parent dd472117aa
commit 75a8d79bb4

View File

@ -203,9 +203,6 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
// Apply shift to value held in second register // Apply shift to value held in second register
a64inst_DPRegister_ArithmLogicData *arithmLogicData = &inst->data.DPRegisterData.processOpData.arithmLogicData; a64inst_DPRegister_ArithmLogicData *arithmLogicData = &inst->data.DPRegisterData.processOpData.arithmLogicData;
uint8_t shiftAmount = arithmLogicData->shiftAmount; uint8_t shiftAmount = arithmLogicData->shiftAmount;
if (arithmLogicData->negShiftedSrc2) {
src2Val = ~src2Val;
}
switch(arithmLogicData->shiftType) { switch(arithmLogicData->shiftType) {
case a64inst_LSL: case a64inst_LSL:
@ -236,6 +233,11 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
break; break;
} }
// Negate second operand if negShiftedSrc2 flag is enabled
if (arithmLogicData->negShiftedSrc2) {
src2Val = truncateValue(~src2Val, regType);
}
dword result; dword result;
switch(arithmLogicData->type) { switch(arithmLogicData->type) {