From 75a8d79bb45f0b095f6946bd096f057c840f100b Mon Sep 17 00:00:00 2001
From: Themis Demetriades <td1223@ic.ac.uk>
Date: Wed, 5 Jun 2024 23:19:53 +0100
Subject: [PATCH] Changed order of operations for DPR logic instructions w/ S

---
 src/execute.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/execute.c b/src/execute.c
index 0506370..86aa33c 100644
--- a/src/execute.c
+++ b/src/execute.c
@@ -203,9 +203,6 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
             // Apply shift to value held in second register
             a64inst_DPRegister_ArithmLogicData *arithmLogicData = &inst->data.DPRegisterData.processOpData.arithmLogicData;
             uint8_t shiftAmount = arithmLogicData->shiftAmount;
-            if (arithmLogicData->negShiftedSrc2) {
-                src2Val = ~src2Val;
-            }
             switch(arithmLogicData->shiftType) {
 
                 case a64inst_LSL:
@@ -236,6 +233,11 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
                     break;
             }
 
+            // Negate second operand if negShiftedSrc2 flag is enabled
+            if (arithmLogicData->negShiftedSrc2) {
+                src2Val = truncateValue(~src2Val, regType);
+            }
+            
             dword result;
             switch(arithmLogicData->type) {