GDBWNV
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f5dabe26b2
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DPI arithmetic
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2024-06-12 17:06:20 +01:00 |
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GDBWNV
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3290896f6e
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add, adds, cmn
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2024-06-12 16:55:30 +01:00 |
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GDBWNV
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28b38f4a80
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small update, sync helper function
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2024-06-12 16:39:33 +01:00 |
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EDiasAlberto
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f32304afb7
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create helper function to generate number from operand
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2024-06-12 16:24:42 +01:00 |
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sBubshait
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269a150926
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Fix types, signatures, and arguments.
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2024-06-12 00:49:25 +01:00 |
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sBubshait
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850f3cf4f7
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Add overall assemble structure
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2024-06-11 23:46:40 +01:00 |
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sBubshait
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31c1ae90f7
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Attempt to make code compile, fix syntax errors
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2024-06-11 23:13:23 +01:00 |
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sBubshait
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efaed431d0
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Added all instruction in subfolder a64instruction
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2024-06-11 23:02:26 +01:00 |
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EDiasAlberto
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6153db7737
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fix compile issues git add . :)
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2024-06-11 17:35:23 +01:00 |
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EDiasAlberto
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92719b6b33
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comments for clarity in parser
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2024-06-09 23:10:39 +01:00 |
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EDiasAlberto
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d0be871e8f
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generate offset operand for load literal with immediate value
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2024-06-09 23:07:45 +01:00 |
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EDiasAlberto
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44bb327b7d
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begin formulating parser pipeline
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2024-06-09 22:54:27 +01:00 |
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EDiasAlberto
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4098ea5a5f
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calculate offsets for different store instructions
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2024-06-09 22:43:37 +01:00 |
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EDiasAlberto
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04dda33987
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calculate base register from input
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2024-06-09 22:21:30 +01:00 |
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EDiasAlberto
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34060c3fad
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fix hierarchy of struct access in parser
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2024-06-06 17:54:35 +01:00 |
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EDiasAlberto
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1fa33798bf
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rewrite DP classification logic
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2024-06-06 17:38:54 +01:00 |
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EDiasAlberto
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225ade7770
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fix use of cpp syntax
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2024-06-06 17:10:18 +01:00 |
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EDiasAlberto
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5413d27026
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adjust operand counts for calculating address format
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2024-06-06 14:46:56 +01:00 |
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EDiasAlberto
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f1ac860d6a
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rewrite address format calculation
as { is not in the actual asm syntax
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2024-06-06 14:46:16 +01:00 |
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EDiasAlberto
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70e02768b6
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fix struct access
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2024-06-06 14:30:13 +01:00 |
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EDiasAlberto
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872d4224f8
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classify register type and base register for load/store
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2024-06-06 14:28:32 +01:00 |
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EDiasAlberto
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1011d7be71
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classify load store addressing type
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2024-06-06 14:14:10 +01:00 |
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EDiasAlberto
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b93ab76b82
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generate branch struct from operands (INCOMPLETE)
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2024-06-06 13:22:54 +01:00 |
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EDiasAlberto
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6177b2f748
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assemble branch instructions
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2024-06-06 13:01:26 +01:00 |
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EDiasAlberto
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bb0f939539
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construct instr IR from label
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2024-06-05 21:07:28 +01:00 |
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EDiasAlberto
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8931c151f8
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removed duped if statement
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2024-06-05 21:02:25 +01:00 |
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EDiasAlberto
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f28d3b4047
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removed alias function temporarily
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2024-06-05 21:01:39 +01:00 |
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EDiasAlberto
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48efdf8284
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classify directprocessing instruction type
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2024-06-05 20:53:56 +01:00 |
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Dias Alberto, Ethan
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4df768f327
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Merge branch 'assembler' into 'assembler-e'
# Conflicts:
# src/parser.c
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2024-06-05 19:01:15 +00:00 |
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EDiasAlberto
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1d1089634f
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add halt command handling
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2024-06-05 19:57:51 +01:00 |
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EDiasAlberto
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129bdf3954
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classify opcode load/store
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2024-06-05 19:57:51 +01:00 |
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EDiasAlberto
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0f04ac9e22
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rename fileaccess
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2024-06-04 14:53:30 +01:00 |
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EDiasAlberto
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ce0f825e1d
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add halt command handling
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2024-06-04 04:24:56 +01:00 |
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EDiasAlberto
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13e2cc8c9d
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classify branch type from opcode
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2024-06-04 03:35:06 +01:00 |
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EDiasAlberto
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bb3218b535
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add detail to assembly skeleton
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2024-06-04 03:07:00 +01:00 |
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EDiasAlberto
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422b0f3e62
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start classifying opcodes and writing skeleton for twopass assembly
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2024-06-04 01:30:17 +01:00 |
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EDiasAlberto
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cadac4e1bb
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rename parser funcs for clarity
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2024-06-03 23:09:40 +01:00 |
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EDiasAlberto
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036e163fe8
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classify asm line type, tokenise operands
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2024-06-03 23:07:31 +01:00 |
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EDiasAlberto
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ba1b614fc1
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comment code for understanding
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2024-06-03 22:02:41 +01:00 |
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EDiasAlberto
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43dd6be707
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add a64instruction structs from emulator
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2024-06-03 21:46:22 +01:00 |
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