diff --git a/src/execute.c b/src/execute.c index f82b97f..4171063 100644 --- a/src/execute.c +++ b/src/execute.c @@ -29,7 +29,7 @@ static dword truncateValue(dword value, a64inst_regType regType) { return value; } else { //return value & ~(dword)((1 << WORD_BITS) - 1) - return value & (((dword)1 << WORD_BITS) - 1); + return value & (dword)(((dword)1 << WORD_BITS) - 1); } } @@ -67,10 +67,15 @@ static dword readRegister(Machine *state, a64inst_regSpecifier reg, a64inst_regT } } -// Read from processor register, ensuring that a valid register specifier is given +// Write to a processor register, ensuring that a valid register specifier is given // and truncating the value being written when it can't fit in the specified register. static void writeRegister(Machine *state, a64inst_regSpecifier reg, a64inst_regType regType, dword value) { - state->registers[reg] = truncateValue(value, regType); + assert(reg <= REGISTER_COUNT); + if (regType == a64inst_R) { + state->registers[reg] = truncateValue(value, regType); + } else { + *(word*)(state->registers + reg) = (word)truncateValue(value, regType); + } } // Updates N and Z condition codes given the machine and a result value @@ -137,9 +142,10 @@ static void executeDPImmediate(Machine *state, a64inst_instruction *inst) { // Execute a wide move data processing instruction case a64inst_DPI_WIDEMOV:; uint8_t shiftScalar = inst->data.DPImmediateData.processOpData.wideMovData.shiftScalar; - uint16_t wideMovImm = inst->data.DPImmediateData.processOpData.wideMovData.immediate; + dword wideMovImm = inst->data.DPImmediateData.processOpData.wideMovData.immediate; // NOTE: Not checking that shiftScalar has valid value for 32bit registers. Possibly add explicit error. + //printf("%x\n", wideMovImm << (shiftScalar * DPI_WIDEMOV_SHIFT) & ); wideMovImm = truncateValue(wideMovImm << (shiftScalar * DPI_WIDEMOV_SHIFT), regType); switch(inst->data.DPImmediateData.processOp) {