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Add decode for Branch Instructions, w/ T

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This commit is contained in:
sBubshait 2024-05-31 17:45:02 +01:00
parent 23d0e826a4
commit d7c23e7bf0
2 changed files with 49 additions and 6 deletions
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36
src/decode.c
View File

@ -22,7 +22,7 @@ a64inst_instruction *decode(word wrd) {
exit(1);
}
word DPImmFlag = getBits(wrd, DATA_PROCESSING_DPIMM_LSB, DATA_PROCESSING_DPIMM_MSB);
word DPImmFlag = getBits(wrd, BRANCH_CONDITIONAL_COND_LSB, BRANCH_CONDITIONAL_COND_MSB);
if (wrd == HALT_WORD) {
inst->type = a64inst_HALT;
@ -31,8 +31,40 @@ a64inst_instruction *decode(word wrd) {
}else if (DPImmFlag == 1) {
inst->type = a64inst_BRANCH;
word branchTypeFlag = getBits(wrd, BRANCH_TYPE_LSB, BRANCH_TYPE_MSB);
inst->data.BranchData.BranchType = branchTypeFlag;
} else if (getBits(wrd, DATA_PROCESSING_DPREG_LSB, DATA_PROCESSING_DPREG_MSB) == 1) {
switch (branchTypeFlag) {
case a64inst_UNCONDITIONAL:
inst->data.BranchData.processOpData.unconditionalData.unconditionalOffset = getBits(wrd, BRANCH_UNCONDITIONAL_OFFSET_LSB, BRANCH_UNCONDITIONAL_OFFSET_MSB);
break;
case a64inst_CONDITIONAL:
inst->data.BranchData.processOpData.conditionalData.offset = getBits(wrd, BRANCH_CONDITIONAL_OFFSET_LSB, BRANCH_CONDITIONAL_OFFSET_MSB);
word conditionFlag = getBits(wrd, BRANCH_CONDITIONAL_COND_LSB, BRANCH_CONDITIONAL_COND_MSB);
if(conditionFlag <= 1 || (conditionFlag >= 10 && conditionFlag <= 14)) {
inst->data.BranchData.processOpData.conditionalData.cond = conditionFlag;
} else {
fprintf(stderr, "Error: Unknown condition detected.\n");
exit(1);
}
break;
case a64inst_REGISTER:
inst->data.BranchData.processOpData.registerData.src = getBits(wrd, BRANCH_REGISTER_SRC_LSB, BRANCH_REGISTER_SRC_MSB);
break;
default:
fprintf(stderr, "Undefined branch type detected!\n");
exit(1);
break;
}
} else if (getBits(wrd, DATA_PROCESSING_REG_LSB, DATA_PROCESSING_REG_MSB) == 1) {
inst->type = a64inst_DPREGISTER;
} else {

19
src/decode.h
View File

@ -4,10 +4,21 @@
#define BYTE_BITS 8
#define HALT_WORD 0x8a000000
#define DATA_PROCESSING_DPIMM_LSB 26
#define DATA_PROCESSING_DPIMM_MSB 29
#define DATA_PROCESSING_IMM_LSB 26
#define DATA_PROCESSING_IMM_MSB 29
#define DATA_PROCESSING_DPREG_LSB 25
#define DATA_PROCESSING_DPREG_MSB 26
#define DATA_PROCESSING_REG_LSB 25
#define DATA_PROCESSING_REG_MSB 26
#define BRANCH_TYPE_LSB 30
#define BRANCH_TYPE_MSB 32
#define BRANCH_UNCONDITIONAL_OFFSET_LSB 0
#define BRANCH_UNCONDITIONAL_OFFSET_MSB 26
#define BRANCH_REGISTER_SRC_LSB 5
#define BRANCH_REGISTER_SRC_MSB 10
#define BRANCH_CONDITIONAL_COND_LSB 0
#define BRANCH_CONDITIONAL_COND_MSB 4
#define BRANCH_CONDITIONAL_OFFSET_LSB 5
#define BRANCH_CONDITIONAL_OFFSET_MSB 24
a64inst_instruction *decode(word w);