Fix function that updates N and Z flags of processor w/ S

This commit is contained in:
Themis Demetriades 2024-06-04 13:24:31 +01:00
parent c6574b72f8
commit d6b551c190

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@ -80,7 +80,9 @@ static void writeRegister(Machine *state, a64inst_regSpecifier reg, a64inst_regT
// Updates N and Z condition codes given the machine and a result value // Updates N and Z condition codes given the machine and a result value
static void updateCondNZ(Machine *state, dword result, a64inst_regType regType) { static void updateCondNZ(Machine *state, dword result, a64inst_regType regType) {
state->conditionCodes.Negative = result & ((1 << (regType ? DWORD_BITS : WORD_BITS)) - 1); size_t msb = (regType ? DWORD_BITS : WORD_BITS) - 1;
state->conditionCodes.Negative = result >> msb;
state->conditionCodes.Zero = result == 0; state->conditionCodes.Zero = result == 0;
} }
@ -243,7 +245,7 @@ void execute_SDT(Machine *state, a64inst_instruction *inst) {
} else { } else {
state->registers[inst->data.SingleTransferData.target] = readDoubleWord(state->memory, address); state->registers[inst->data.SingleTransferData.target] = readDoubleWord(state->memory, address);
} }
}else { } else {
if (inst->data.SingleTransferData.regType == a64inst_W) { if (inst->data.SingleTransferData.regType == a64inst_W) {
// 32 bit access // 32 bit access
state->registers[inst->data.SingleTransferData.target] = readWord(state->memory, address); state->registers[inst->data.SingleTransferData.target] = readWord(state->memory, address);