From b93ab76b8257354baf6d3ab2987f739eb9c6411f Mon Sep 17 00:00:00 2001
From: EDiasAlberto <proxamon1@gmail.com>
Date: Thu, 6 Jun 2024 13:22:54 +0100
Subject: [PATCH] generate branch struct from operands (INCOMPLETE)

---
 src/parser.c          | 34 ++++++++++++++++++++++++++++++++++
 src/twopassassembly.c |  3 ++-
 2 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/src/parser.c b/src/parser.c
index 004e5fb..c3167f1 100644
--- a/src/parser.c
+++ b/src/parser.c
@@ -14,6 +14,39 @@
 // - count operands and match type/values
 // - generate final a64inst and return
 
+void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *operandList[]){
+    switch(instr->data.BranchType){
+        case a64inst_UNCONDITIONAL:
+            //define and sign extend immediate offset
+            //use symbol table
+            break;
+        case a64inst_REGISTER:
+            char *endptr;
+            instr->data.BranchData.processOpData.src = strtol(operandList[0] + 1, endptr, 2)
+            break;
+        case a64inst_CONDITIONAL:
+            char* condition = strtok(strdup(opcode), "b.");
+            condition = strtok(NULL, "");
+            if(strcmp(condition, "eq")==0){
+                instr->data.BranchData.processOpData.cond = EQ;
+            } else if (strcmp(condition, "ne")==0){
+                instr->data.BranchData.processOpData.cond = NE;
+            } else if (strcmp(condition, "ge")==0){
+                instr->data.BranchData.processOpData.cond = GE;
+            } else if (strcmp(condition, "lt")==0){
+                instr->data.BranchData.processOpData.cond = LT;
+            } else if (strcmp(condition, "gt")==0){
+                instr->data.BranchData.processOpData.cond = GT;
+            } else if (strcmp(condition, "le")==0){
+                instr->data.BranchData.processOpData.cond = LE;
+            } else if (srtcmp(condition, "al")==0){
+                instr->data.BranchData.processOpData.cond = AL;
+            }
+            break;
+            //calculate offset from symbol table.
+    }
+}
+
 void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[]){
     if((int isUnconditional = strcmp(opcode, "b")) == 0 || 
         (int isRegister = strcmp(opcode, "br")) == 0 || 
@@ -27,6 +60,7 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
                 instr->data.BranchData.BranchType = a64inst_CONDITIONAL;
                 //instr->data.branchData.processOpData.cond = {remove first two chars of opcode}
             }
+            generateBranchOperands(instr, opcode, operandList);
     } else if((int isLoad = strcmp(opcode, "ldr")) == 0 || (int isStore = strcmp(opcode, "str")) == 0){
         //loading/storing instruction; classify operands
         char *address = operandList[1];
diff --git a/src/twopassassembly.c b/src/twopassassembly.c
index c701732..5729b61 100644
--- a/src/twopassassembly.c
+++ b/src/twopassassembly.c
@@ -13,7 +13,7 @@ void generateSymbolTable(a64inst_instruction instrs[], int numInstrs){
     }
 }
 
-word assembleBranch(a64inst_instruction *instr, int ){
+word assembleBranch(a64inst_instruction *instr){
     word binInstr = 0;
     binInstr += (5^28); //101 start of branch instr
     switch (instr->data.BranchData.BranchType)
@@ -41,6 +41,7 @@ word assembleBranch(a64inst_instruction *instr, int ){
     default:
         break;
     }
+    return binInstr;
 }
 
 void firstPass(a64inst_instruction instrs[], int numInstrs){