From 999f36facd4dd95bacf730a7b9b7357381126669 Mon Sep 17 00:00:00 2001
From: sBubshait <s.bobshit@gmail.com>
Date: Tue, 11 Jun 2024 23:19:04 +0100
Subject: [PATCH] Fix bugs to make code compile. Code now compiles

---
 src/symboltable.h     |  49 -----------------
 src/twopassassembly.c | 121 +++++++++++++++++++++---------------------
 2 files changed, 60 insertions(+), 110 deletions(-)
 delete mode 100644 src/symboltable.h

diff --git a/src/symboltable.h b/src/symboltable.h
deleted file mode 100644
index cd2037c..0000000
--- a/src/symboltable.h
+++ /dev/null
@@ -1,49 +0,0 @@
-#include <stdio.h>
-
-typedef struct st st;
-
-
-
-typedef struct {
-    const void* key;
-    void* value;
-    node* prev;
-    node* next;
-} node;
-
-struct st {
-    node* head;
-    node* tail;
-};
-
-// add new node to the end
-void st_add(st table, void* key, void* value) {
-    node n = {key, value, table.tail};
-    if (table.head == NULL) {
-        table.head = &n;
-        table.tail = &n;
-    }
-    else {
-        (*(table.tail)).next = &n;
-        table.tail = &n;
-    }  
-}
-
-// returns the pointer to key of the specified node, or null, if it does not exist
-void* st_search(st table, void* key) {
-    return nodeSearch(table.head, key);
-}
-
-void* nodeSearch(node* n, void* key) {
-    if (n != NULL) {
-        if ((*n).key == key) {
-            return (*n).value;
-        }
-        else {
-            return nodeSearch((*n).next, key);
-        }
-    }
-    else {
-        return NULL;
-    }
-}
\ No newline at end of file
diff --git a/src/twopassassembly.c b/src/twopassassembly.c
index b5dccae..e6899d5 100644
--- a/src/twopassassembly.c
+++ b/src/twopassassembly.c
@@ -1,32 +1,33 @@
 #include "global.h"
 #include "a64instruction/a64instruction.h"
 #include "symboltable.c"
-//generates assembled code based on two pass assembly method
+#include <stdlib.h>
+#include <limits.h>
 
+// Generates assembled code based on the two-pass assembly method
 
-word assembleBranch(a64inst_instruction *instr){
+word assembleBranch(a64inst_instruction *instr) {
     word binInstr = 0;
-    binInstr += (5^28); //101 start of branch instr
-    switch (instr->data.BranchData.BranchType)
-    {
+    binInstr += (5 << 28); // 101 start of branch instr
+    switch (instr->data.BranchData.BranchType) {
     case a64inst_UNCONDITIONAL:
-        //000101
-        //25-0: sign extended simm26
+        // 000101
+        // 25-0: sign extended simm26
         binInstr += instr->data.BranchData.processOpData.unconditionalData.unconditionalOffset;
         break;
     case a64inst_REGISTER:
-        //10000
-        //11111
-        //000000
-        //9-5: address from register
-        //0000
-        binInstr += ((instr->data.BranchData.processOpData.registerData.src)^5);
+        // 10000
+        // 11111
+        // 000000
+        // 9-5: address from register
+        // 0000
+        binInstr += ((instr->data.BranchData.processOpData.registerData.src) << 5);
         break;
     case a64inst_CONDITIONAL:
-        // 01010100 
+        // 01010100
         // 25-5: sign extended offset
         // 4-0: 0{condition}
-        binInstr += ((instr->data.BranchData.processOpData.conditionalData.offset)^5);
+        binInstr += ((instr->data.BranchData.processOpData.conditionalData.offset) << 5);
         binInstr += instr->data.BranchData.processOpData.conditionalData.cond;
         break;
     default:
@@ -35,43 +36,43 @@ word assembleBranch(a64inst_instruction *instr){
     return binInstr;
 }
 
-st* firstPass(a64inst_instruction instrs[], int numInstrs){
-    //TODO:
+st* firstPass(a64inst_instruction instrs[], int numInstrs) {
+    // TODO:
     // -iterate over instructions, adding to symbol table
     // create symbol table and map labels to addresses/lines
-    struct st table;
-    for(int i=0; i<numInstrs; i++){
-        
+    st *table = (st*)malloc(sizeof(st));
+    for (int i = 0; i < numInstrs; i++) {
         // discuss defining a LABEL type
-        if(instrs[i].type==a64inst_LABEL){
-            st_add(table, &(instrs[i].data.LabelData.label), &i);
+        if (instrs[i].type == a64inst_LABEL) {
+            st_add(*table, &(instrs[i].data.LabelData.label), &i);
         }
     }
-    return &table;
+    return table;
 }
+
 word dpi(a64inst_instruction cI) {
     word out = 0;
     a64inst_DPImmediateData data = cI.data.DPImmediateData;
-    //sf
-    out += data.regType*(2^31);
-    out += data.processOp*(2^29);
-    out += 2^28;
+    // sf
+    out += data.regType * (1 << 31);
+    out += data.processOp * (1 << 29);
+    out += 1 << 28;
     // if arithmetic
     if (data.DPIOpType == a64inst_DPI_ARITHM) {
-        out += 2^24;
+        out += 1 << 24;
         // shift
-        if (data.processOpData.arithmData.shiftImmediate){
-            out += 2^22;
+        if (data.processOpData.arithmData.shiftImmediate) {
+            out += 1 << 22;
         }
-        out += data.processOpData.arithmData.immediate*(2^10);
-        out += data.processOpData.arithmData.src*(2^5);
+        out += data.processOpData.arithmData.immediate * (1 << 10);
+        out += data.processOpData.arithmData.src * (1 << 5);
     }
     // if wide move
     else {
-        out += 5*(2^23);
+        out += 5 * (1 << 23);
         // hw
-        out += data.processOpData.wideMovData.shiftScalar*(2^21);
-        out += data.processOpData.wideMovData.immediate*(2^5);
+        out += data.processOpData.wideMovData.shiftScalar * (1 << 21);
+        out += data.processOpData.wideMovData.immediate * (1 << 5);
     }
     // destination register
     out += data.dest;
@@ -84,7 +85,7 @@ word dpr(a64inst_instruction cI) {
     // sf
     int sf = data.regType;
     // bits 27-25
-    out += 5*(2^25);
+    out += 5 * (1 << 25);
     int m = data.DPROpType;
     int opc = 0;
     int opr = 0;
@@ -94,7 +95,7 @@ word dpr(a64inst_instruction cI) {
     int rd = 0;
     // multiply
     if (m == 1) {
-        //opc = 0;
+        // opc = 0;
         opr = 8;
         if (data.processOpData.multiplydata.negProd) {
             operand += 32;
@@ -104,9 +105,9 @@ word dpr(a64inst_instruction cI) {
     // arithmetic and logical
     else {
         // shift
-        opr += 2*data.processOpData.arithmLogicData.shiftType;
+        opr += 2 * data.processOpData.arithmLogicData.shiftType;
         // arithmetic
-        if (data.processOpData.arithmLogicData.type == 1){
+        if (data.processOpData.arithmLogicData.type == 1) {
             opr += 8;
         }
         // logical
@@ -120,11 +121,11 @@ word dpr(a64inst_instruction cI) {
     rm += data.src1;
     rn += data.src2;
     rd += data.dest;
-    out += sf*(2^31);
-    out += opc * (2^29);
-    out += m* (2^28);
-    out += opr * (2^21);
-    out += rm * (2^16);
+    out += sf * (1 << 31);
+    out += opc * (1 << 29);
+    out += m * (1 << 28);
+    out += opr * (1 << 21);
+    out += rm * (1 << 16);
     out += operand * 1024;
     out += rn * 32;
     out += rd;
@@ -136,17 +137,16 @@ word sts(a64inst_instruction cI) {
     word out = 0;
     a64inst_SingleDataTransferData data2 = data.processOpData.singleDataTransferData;
     // this deals with every bit in the 31-23 range apart from sf and U
-    out += (512+128+64+32)*(2^23);
+    out += (512 + 128 + 64 + 32U) * (1 << 23);
     int sf = data.regType;
     int u = 0;
-    int l = data2.transferType;
     int offset = 0;
     int xn = data2.base;
     int rt = data.target;
     switch (data2.addressingMode) {
         // register offset
         case 2:
-            offset += 2074 + 64*data2.a64inst_addressingModeData.offsetReg;
+            offset += 2074 + 64 * data2.a64inst_addressingModeData.offsetReg;
             break;
         // unsigned offset
         case 3:
@@ -155,37 +155,36 @@ word sts(a64inst_instruction cI) {
             break;
         // pre/post indexed
         default:
-            offset = 1 + data2.addressingMode*2 + data2.a64inst_addressingModeData.indexedOffset*4;
+            offset = 1 + data2.addressingMode * 2 + data2.a64inst_addressingModeData.indexedOffset * 4;
             break;
     }
-    out += sf*(2^30);
-    out += u*(2^22);
-    out += offset*1024;
+    out += sf * (1 << 30);
+    out += u * (1 << 22);
+    out += offset * 1024;
     out += xn * 32;
     out += rt;
     return out;
 }
 
 word ldl(a64inst_instruction cI) {
-    word out = 3*(2^27);
+    word out = 3 * (1 << 27);
     a64inst_SingleTransferData data = cI.data.SingleTransferData;
     int sf = data.regType;
     int simm19 = data.processOpData.loadLiteralData.offset;
     int rt = data.target;
-    out += sf * (2^30);
-    out += simm19*32;
+    out += sf * (1 << 30);
+    out += simm19 * 32;
     out += rt;
     return out;
 }
 
-void secondPass(a64inst_instruction instrs[], int numInstrs, st* table, word arr[]){
-    //TODO:
+void secondPass(a64inst_instruction instrs[], int numInstrs, st* table, word arr[]) {
+    // TODO:
     // iterate over instructions again, this time replacing labels
     // with values from symbol table
     // after a line has had all the values replaced, assemble it and append
     int index = 0;
-    int lbl = 0;
-    for (int i=0; i<numInstrs; i++) {
+    for (int i = 0; i < numInstrs; i++) {
         a64inst_instruction cI = instrs[i];
         switch (cI.type) {
             case a64inst_DPIMMEDIATE:
@@ -209,11 +208,11 @@ void secondPass(a64inst_instruction instrs[], int numInstrs, st* table, word arr
                 index++;
                 break;
             case a64inst_HALT:
-                arr[index] = 69*(2^25);
+                arr[index] = 69U * (1 << 25);
                 index++;
                 break;
             case a64inst_LABEL:
-                lbl++;
+                // Labels are handled in the first pass and used for addressing.
                 break;
             case a64inst_BRANCH:
                 arr[index] = assembleBranch(&cI);
@@ -223,4 +222,4 @@ void secondPass(a64inst_instruction instrs[], int numInstrs, st* table, word arr
         }
     }
     return;
-}
\ No newline at end of file
+}