Rewrite the parser for better structure, Add DPI parsing
This commit is contained in:
sBubshait
parent
38e5cd06fa
commit
995c6d02fa
427
src/parser.c
427
src/parser.c
@ -5,18 +5,159 @@
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#include <stdbool.h>
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#include "parser.h"
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#include "a64instruction/a64instruction.h"
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#include "tokeniser.c"
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//takes input string, read from asm file and returns
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//input as an a64 instruction
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/** Prototypes */
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void parse_instruction(char asmLine[], a64inst_instruction *instr);
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static char *duplicateString(char *str);
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void parseSingleTransfer(a64inst_instruction *instr, char *opcode, char *operandList[], int numOperands);
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void parseBranch(a64inst_instruction *instr, char* opcode, char *operandList[]);
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void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], int numOperands);
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void parseDPImmediate(a64inst_instruction *inst, char *tokens[], int tokensCount);
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/** Constants */
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static const char *BRANCH_OPCODES[] = {"b", "br", "b.eq", "b.ne", "b.ge", "b.lt", "b.gt", "b.le", "b.al"};
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static const char *SINGLE_TRANSFER_OPCODES[] = {"ldr", "str"};
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static const char *WIDE_MOV_OPCODES[] = {"movn", "movz", "movz", "movk"};
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static const char *ARITHMETIC_OPCODES[] = {"add", "adds", "sub", "subs"};
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static const char *MULTIPLY_OPCODES[] = {"mul", "madd", "msub", "mneg"};
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a64inst_instruction *parse(char **asmLines, int lineCount) {
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a64inst_instruction *instructions = malloc(sizeof(a64inst_instruction) * lineCount);
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int i = 0;
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while (asmLines[i] != NULL) {
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parse_instruction(asmLines[i], &instructions[i]);
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i++;
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}
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return instructions;
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}
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static char *duplicateString(char *str) {
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char *newStr = malloc(strlen(str) + 1);
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strcpy(newStr, str);
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return newStr;
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}
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static bool isStringIn(char *str, const char *arr[], int arrSize) {
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for (int i = 0; i < arrSize; i++) {
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if (strcmp(str, arr[i]) == 0) {
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return true;
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}
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}
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return false;
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}
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// If more than one occurance, return the last index
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static int indexStringIn(char *str, const char *arr[], int arrSize) {
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for (int i = arrSize - 1; i >= 0; i--) {
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if (strcmp(str, arr[i]) == 0) {
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return i;
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}
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}
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return -1;
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}
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int isOperandRegister(char regStartChar) {
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return((regStartChar == 'x') || (regStartChar == 'w'));
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}
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int classifyDPInst(char *operandList[]){
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return(isOperandRegister(operandList[1][0]) &&
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isOperandRegister(operandList[2][0]) &&
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isOperandRegister(operandList[3][0]));
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}
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void classifyOpcode(char* opcode, a64inst_instruction *instr, char *tokens[], int tokensCount){
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if (isStringIn(opcode, BRANCH_OPCODES, 9)) {
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instr->type = a64inst_BRANCH;
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if (strcmp(opcode, "br") == 0) {
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instr->data.BranchData.BranchType = a64inst_REGISTER;
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} else if (strcmp(opcode, "b") == 0) {
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instr->data.BranchData.BranchType = a64inst_UNCONDITIONAL;
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} else {
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instr->data.BranchData.BranchType = a64inst_CONDITIONAL;
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}
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} else if (isStringIn(opcode, SINGLE_TRANSFER_OPCODES, 2)) {
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instr->type = a64inst_SINGLETRANSFER;
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if (*tokens[2] == '[') {
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instr->data.SingleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = strcmp(opcode, "ldr") == 0;
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} else {
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instr->type = a64inst_LOADLITERAL;
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}
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} else if (classifyDPInst(tokens)) {
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instr->type = a64inst_DPREGISTER;
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} else {
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instr->type = a64inst_DPIMMEDIATE;
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}
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}
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void parse_instruction(char asmLine[], a64inst_instruction *instr) {
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if (instr == NULL){
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exit(EXIT_FAILURE);
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}
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if(strcmp(asmLine, HALT_ASM_CMD) == 0){
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instr->type = a64inst_HALT;
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return;
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}
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char *asmLineCopy = duplicateString(asmLine);
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int tokensCount = 0;
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char **tokens = tokenise(asmLineCopy, &tokensCount);
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char *opcode = tokens[0];
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if(strcmp(opcode, ".int") == 0){
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// Directive
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instr->type = a64inst_DIRECTIVE;
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} else if(opcode[strlen(opcode)-1]== ':') {
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// Label
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instr->type = a64inst_LABEL;
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opcode[strlen(opcode) - 1] = '\0'; // Remove the colon
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instr->data.LabelData.label = opcode;
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} else {
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// Instruction
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classifyOpcode(opcode, instr, tokens, tokensCount);
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switch(instr->type){
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case a64inst_BRANCH:
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parseBranch(instr, opcode, tokens);
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break;
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case a64inst_SINGLETRANSFER:
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parseSingleTransfer(instr, opcode, tokens, tokensCount);
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calcluateAddressFormat(instr, tokens, tokensCount);
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break;
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case a64inst_LOADLITERAL:
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parseSingleTransfer(instr, opcode, tokens, tokensCount);
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break;
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case a64inst_DPREGISTER:
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//generate DP operands;
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break;
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case a64inst_DPIMMEDIATE:
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parseDPImmediate(instr, tokens, tokensCount);
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break;
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default:
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printf("Error: Invalid Instruction\n");
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break;
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}
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}
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/* TODO: FREE MEMORY! */
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}
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//TODO:
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// - use string matching to get opcode, and operands (DONE)
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// - check operand count (DONE)
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// - match opcode to a64 struct types (DONE)
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// - count operands and match type/values (DONE)
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// - generate final a64inst and return (TODO: DP instrs)
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// - ASK ABOUT OFFSET CALCULATION
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// - CREATE FUNC TO TIDY UP OPERANDS IN DP
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//takes inputted char array and returns the integer of the operand, skipping the first character
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//e.g. for a passed "R32", it skips the 'R' and returns 32
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@ -28,64 +169,61 @@ int getOperandNumber(char *operand){
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return number;
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}
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int isOperandRegister(char regStartChar){
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return((regStartChar == 'x') || (regStartChar == 'w'));
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}
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//calculate offsets from string
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void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], int numOperands){
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char baseRegParam[strlen(operandList[1])];
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strcpy(baseRegParam, operandList[1]);
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char *startptr = &baseRegParam[1];
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int base = getOperandNumber(startptr);
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instr->data.SingleTransferData.processOpData.singleDataTransferData.base = base;
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void calcluateAddressFormat(a64inst_instruction *instr, char *tokens[], int tokenCount) {
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assert(*tokens[2] == '[');
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if(operandList[2][strlen(operandList[2])-2] == '!'){
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int operandCount = 0;
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char **operands = tokeniseOperands(tokens[2], &operandCount);
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int baseRegister = getOperandNumber(operands[0]);
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instr->data.SingleTransferData.processOpData.singleDataTransferData.base = baseRegister;
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if(operands[1][strlen(operands[1])-1] == '!') {
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_PRE_INDEXED;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = getOperandNumber(operandList[2]);
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} else if(operandList[1][strlen(operandList[1])-2] == ']') {
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//post-indexed
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char immOffset[strlen(operandList[2])+1];
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strcpy(immOffset, operandList[2]);
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = getOperandNumber(operands[1]);
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} else if(operands[1][strlen(operands[1])-1] == ']') {
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// POST_INDEXED
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_POST_INDEXED;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = getOperandNumber(immOffset);
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} else if( (isOperandRegister(operandList[1][0]) == 1)
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|| (isOperandRegister(operandList[2][0]) == 1)){
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = getOperandNumber(tokens[3]);
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} else if( (isOperandRegister(*operands[0]) == 1)
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&& (isOperandRegister(*operands[1]) == 1)){
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//register
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_REGISTER_OFFSET;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.offsetReg = getOperandNumber(operandList[2]);
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.offsetReg = getOperandNumber(operands[1]);
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} else {
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_UNSIGNED_OFFSET;
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if(numOperands==3){
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int offset = getOperandNumber(operandList[2]);
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if(operandCount > 1){
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int offset = getOperandNumber(operands[1]);
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.unsignedOffset = offset/8;
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//NEED TO SCALE IMMEDIATE VALUE BASED ON REGISTER TYPE IN ASSEMBLER
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}
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}
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}
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void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[], int numOperands){
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static int parseRegisterType(char *operand) {
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return operand[0] == 'x';
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}
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void parseSingleTransfer(a64inst_instruction *instr, char *opcode, char *tokens[], int tokensCount) {
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switch(instr->type){
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case a64inst_SINGLETRANSFER: {
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if(operandList[0][0] == 'x'){
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//x-register
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instr->data.SingleTransferData.regType = 1;
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} else {
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instr->data.SingleTransferData.regType = 0;
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}
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instr->data.SingleTransferData.target = getOperandNumber(operandList[0]);
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case a64inst_SINGLETRANSFER:
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instr->data.SingleTransferData.regType = parseRegisterType(tokens[1]);
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instr->data.SingleTransferData.target = getOperandNumber(tokens[1]);
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break;
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}
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case a64inst_LOADLITERAL:
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if(operandList[0][0] == 'x') {
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instr->data.SingleTransferData.regType = 1;
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} else {
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instr->data.SingleTransferData.regType = 0;
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}
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instr->data.SingleTransferData.target = getOperandNumber(operandList[0]);
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if(operandList[1][0] =='#'){
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instr->data.SingleTransferData.regType = parseRegisterType(tokens[1]);
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instr->data.SingleTransferData.target = getOperandNumber(tokens[1]);
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if(*tokens[2] =='#'){
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//offset is immediate
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int offset = getOperandNumber(operandList[1]);
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int offset = getOperandNumber(tokens[1]);
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instr->data.SingleTransferData.processOpData.loadLiteralData.offset = offset;
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} else {
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//offset is literal, use symbol table and calculate difference
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@ -97,7 +235,7 @@ void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *o
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}
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}
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void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *operandList[]){
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void parseBranch(a64inst_instruction *instr, char* opcode, char *operandList[]) {
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switch(instr->data.BranchData.BranchType){
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case a64inst_UNCONDITIONAL:
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//define and sign extend immediate offset
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@ -132,155 +270,62 @@ void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *oper
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}
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}
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int classifyDPInst(char *operandList[]){
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return(isOperandRegister(operandList[0][0]) &&
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isOperandRegister(operandList[1][0]) &&
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isOperandRegister(operandList[2][0]));
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}
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void parseDPImmediate(a64inst_instruction *inst, char *tokens[], int tokensCount) {
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a64inst_DPImmediateData *data = &inst->data.DPImmediateData;
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data->dest = getOperandNumber(tokens[1]);
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data->regType = parseRegisterType(tokens[1]);
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void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[], int numOperands){
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int isUnconditional = strcmp(opcode, "b");
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int isRegister = strcmp(opcode, "br");
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int isLoad = strcmp(opcode, "ldr");
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int isStore = strcmp(opcode, "str");
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if(isUnconditional == 0 ||
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isRegister == 0 ||
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strncmp(opcode, "b.", 2) == 0){
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instr->type = a64inst_BRANCH;
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if(isRegister == 0){
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instr->data.BranchData.BranchType = a64inst_REGISTER;
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} else if (isUnconditional == 0){
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instr->data.BranchData.BranchType = a64inst_UNCONDITIONAL;
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} else {
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instr->data.BranchData.BranchType = a64inst_CONDITIONAL;
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}
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} else if(isLoad == 0 || isStore == 0){
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//loading/storing instruction; classify operands
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if( operandList[1][0] == '['){
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//type is register
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instr->type = a64inst_SINGLETRANSFER;
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instr->data.SingleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER;
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if(isLoad == 0){
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instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
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} else {
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instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_STORE;
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}
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} else {
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instr->type = a64inst_LOADLITERAL;
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if (isStringIn(tokens[0], WIDE_MOV_OPCODES, 3)) {
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data->DPIOpType = a64inst_DPI_WIDEMOV;
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data->processOp = indexStringIn(tokens[0], WIDE_MOV_OPCODES, 3);
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data->processOpData.wideMovData.immediate = getOperandNumber(tokens[2]);
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if (tokensCount >= 3) {
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data->processOpData.wideMovData.shiftScalar = getOperandNumber(tokens[3]);
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}
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} else {
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if(classifyDPInst(operandList)){
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instr->type = a64inst_DPREGISTER;
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data->DPIOpType = a64inst_DPI_ARITHM;
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data->processOp = indexStringIn(tokens[0], ARITHMETIC_OPCODES, 4);
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data->processOpData.arithmData.src = getOperandNumber(tokens[2]);
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data->processOpData.arithmData.immediate = getOperandNumber(tokens[3]);
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if (tokensCount >= 5) {
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int shiftAmount = getOperandNumber(tokens[4]);
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if (shiftAmount > 0) {
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data->processOpData.arithmData.shiftImmediate = true;
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}
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}
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}
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}
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void parseDPRegister(a64inst_instruction *inst, char *tokens[], int tokensCount) {
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a64inst_DPRegisterData *data = &inst->data.DPRegisterData;
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data->dest = getOperandNumber(tokens[1]);
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data->regType = parseRegisterType(tokens[1]);
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data->src1 = getOperandNumber(tokens[2]);
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data->src2 = getOperandNumber(tokens[3]);
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if (isStringIn(tokens[0], MULTIPLY_OPCODES, 4)) {
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// Multiply
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data->DPROpType = a64inst_DPR_MULTIPLY;
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if (tokensCount >= 5) {
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data->processOpData.multiplydata.summand = getOperandNumber(tokens[4]);
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data->processOpData.multiplydata.negProd = strcmp(tokens[4], "mneg") == 0;
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}
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} else {
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instr->type = a64inst_DPIMMEDIATE;
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}
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// Arithmetic/Logic
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data->DPROpType = a64inst_DPR_ARITHMLOGIC;
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}
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}
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if (isStringIn(tokens[0], ARITHMETIC_OPCODES, 4)) {
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// Arithmetic
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data->processOp = indexStringIn(tokens[0], ARITHMETIC_OPCODES, 4);
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data->processOpData.arithmLogicData.type = 1;
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void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOperands){
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assert(str != NULL);
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char *operandsDupe = malloc(strlen(str)+1);
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assert(operandsDupe != NULL);
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strcpy(operandsDupe, str);
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char *operand = strtok(operandsDupe, OPERAND_DELIMITER);
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operands[0] = operand;
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while (operand != NULL){
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*operandCount = *(operandCount)+1;
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operand = strtok(NULL, OPERAND_DELIMITER);
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operands[*(operandCount)] = operand;
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}
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*(numOperands) = *(operandCount);
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}
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//takes inputted assembly line and returns a
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//pointer to an abstract representation of the instruction
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void parser_instruction(char asmLine[], a64inst_instruction *instr) {
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printf("%s", asmLine);
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int numOperands = 0;
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if (instr == NULL){
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exit(EXIT_FAILURE);
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}
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if(strcmp(asmLine, HALT_ASM_CMD) == 0){
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instr->type = a64inst_HALT;
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return;
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}
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//"opcode operand1, {operand2}, ..."
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//duplicated as strtok modifies the input string
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char stringptr[strlen(asmLine) + 1];
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strcpy(stringptr, asmLine);
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char *token;
|
||||
token = strtok(stringptr, " ");
|
||||
char opcode[strlen(token)+1];
|
||||
strcpy(opcode, token);
|
||||
token = strtok(NULL, "");
|
||||
char operands[strlen(token)+1];
|
||||
strcpy(operands, token);
|
||||
|
||||
if(strcmp(opcode, ".int") == 0){
|
||||
//type is directive
|
||||
instr->type = a64inst_DIRECTIVE;
|
||||
|
||||
} else if(opcode[strlen(opcode)-1]== ':') {
|
||||
//type is label
|
||||
//add to symbol table
|
||||
instr->type = a64inst_LABEL;
|
||||
char opcodeCpy[strlen(opcode)+1];
|
||||
strcpy(opcodeCpy, opcode);
|
||||
char *labelData = strtok(opcodeCpy, ":");
|
||||
instr->data.LabelData.label = labelData;
|
||||
} else {
|
||||
//type is instruction
|
||||
int operandCount = 0;
|
||||
char *operandList[5];
|
||||
//generate list of operands
|
||||
tokeniseOperands(operands, &operandCount, operandList, &numOperands);
|
||||
//categorise instruction type from opcode and operands
|
||||
classifyOpcode(opcode, instr, operandList, operandCount);
|
||||
//define struct values according to operands and type
|
||||
printf("got to here");
|
||||
switch(instr->type){
|
||||
case a64inst_BRANCH:
|
||||
generateBranchOperands(instr, opcode, operandList);
|
||||
break;
|
||||
case a64inst_SINGLETRANSFER:
|
||||
generateLoadStoreOperands(instr, opcode, operandList, numOperands);
|
||||
calcluateAddressFormat(instr, operandList, numOperands);
|
||||
break;
|
||||
case a64inst_LOADLITERAL:
|
||||
generateLoadStoreOperands(instr, opcode, operandList, numOperands);
|
||||
break;
|
||||
case a64inst_DPREGISTER:
|
||||
//generate DP operands;
|
||||
break;
|
||||
case a64inst_DPIMMEDIATE:
|
||||
//generate DP operands;
|
||||
break;
|
||||
default:
|
||||
printf("INVALID INSTRUCTION");
|
||||
break;
|
||||
}
|
||||
// Logic
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
// Takes an array of strings, each string representing an assembly instruction.
|
||||
// Returns an array of a64inst_instruction pointers, each representing an instruction.
|
||||
a64inst_instruction *parse(char **asmLines, int lineCount) {
|
||||
a64inst_instruction *instructions = malloc(sizeof(a64inst_instruction) * lineCount);
|
||||
|
||||
int i = 0;
|
||||
while (asmLines[i] != NULL) {
|
||||
parser_instruction(asmLines[i], &instructions[i]);
|
||||
i++;
|
||||
}
|
||||
|
||||
return instructions;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user