From 5afcb8ef63785039075decfd678c2bfa3da61f3a Mon Sep 17 00:00:00 2001 From: Themis Demetriades Date: Mon, 3 Jun 2024 20:40:05 +0100 Subject: [PATCH] Fix redeclaration of variable in execute w/ S --- src/execute.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/execute.c b/src/execute.c index 3afa99c..31d31aa 100644 --- a/src/execute.c +++ b/src/execute.c @@ -92,30 +92,30 @@ static void executeDPImmediate(Machine *state, a64inst_instruction *inst) { case a64inst_DPI_ARITHM:; // If shift flag is enabled, logical left shift by the number of bits specified by the architecture - dword immediate = inst->data.DPImmediateData.processOpData.arithmData.immediate; + dword arithmImm = inst->data.DPImmediateData.processOpData.arithmData.immediate; dword srcVal = state->registers[inst->data.DPImmediateData.processOpData.arithmData.src]; if (inst->data.DPImmediateData.processOpData.arithmData.shiftImmediate) { - immediate = truncateValue(immediate << DPI_ARITHM_SHIFT, regType); + arithmImm = truncateValue(arithmImm << DPI_ARITHM_SHIFT, regType); } switch(inst->data.DPImmediateData.processOp) { dword result; case(a64inst_ADDS): - result = srcVal + immediate; + result = srcVal + arithmImm; writeRegister(state, dest, regType, result); updateCondNZ(state, result, regType); - state->conditionCodes.Overflow = max(srcVal, immediate) > result; + state->conditionCodes.Overflow = max(srcVal, arithmImm) > result; state->conditionCodes.Carry = state->conditionCodes.Overflow; break; case(a64inst_ADD): - writeRegister(state, dest, regType, srcVal + immediate); + writeRegister(state, dest, regType, srcVal + arithmImm); break; case(a64inst_SUBS): - result = srcVal - immediate; + result = srcVal - arithmImm; writeRegister(state, dest, regType, result); updateCondNZ(state, result, regType); @@ -124,7 +124,7 @@ static void executeDPImmediate(Machine *state, a64inst_instruction *inst) { break; case(a64inst_SUB): - writeRegister(state, dest, regType, srcVal - immediate); + writeRegister(state, dest, regType, srcVal - arithmImm); break; // Unknown opcode detected! @@ -137,23 +137,23 @@ static void executeDPImmediate(Machine *state, a64inst_instruction *inst) { // Execute a wide move data processing instruction case a64inst_DPI_WIDEMOV:; uint8_t shiftScalar = inst->data.DPImmediateData.processOpData.wideMovData.shiftScalar; - uint16_t immediate = inst->data.DPImmediateData.processOpData.wideMovData.immediate; + uint16_t wideMovImm = inst->data.DPImmediateData.processOpData.wideMovData.immediate; // NOTE: Not checking that shiftScalar has valid value for 32bit registers. Possibly add explicit error. - immediate = truncateValue(shiftScalar * DPI_WIDEMOV_SHIFT, regType); + wideMovImm = truncateValue(shiftScalar * DPI_WIDEMOV_SHIFT, regType); switch(inst->data.DPImmediateData.processOp) { case(a64inst_MOVN): - writeRegister(state, dest, regType, ~immediate); + writeRegister(state, dest, regType, ~wideMovImm); break; case(a64inst_MOVZ): - writeRegister(state, dest, regType, immediate); + writeRegister(state, dest, regType, wideMovImm); break; case(a64inst_MOVK):; dword result = readRegister(state, dest, regType); - result = (result & ~(((1 << DPI_WIDEMOV_SHIFT) - 1) << shiftScalar)) | immediate; + result = (result & ~(((1 << DPI_WIDEMOV_SHIFT) - 1) << shiftScalar)) | wideMovImm; writeRegister(state, dest, regType, result); break;