From f57e0a786f10c3cf7c0021985c2fddda12765773 Mon Sep 17 00:00:00 2001 From: EDiasAlberto Date: Thu, 6 Jun 2024 17:14:56 +0100 Subject: [PATCH 1/3] rename assembler funcs for clarity --- src/twopassassembly.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/twopassassembly.c b/src/twopassassembly.c index cda97ec..50fe029 100644 --- a/src/twopassassembly.c +++ b/src/twopassassembly.c @@ -49,7 +49,7 @@ st* firstPass(a64inst_instruction instrs[], int numInstrs){ } return &table; } -word dpi(a64inst_instruction cI) { +word assembleDPI(a64inst_instruction cI) { word out = 0; a64inst_DPImmediateData data = cI.data.DPImmediateData; //sf @@ -78,7 +78,7 @@ word dpi(a64inst_instruction cI) { return out; } -word dpr(a64inst_instruction cI) { +word assembleDPR(a64inst_instruction cI) { word out = 0; a64inst_DPRegisterData data = cI.data.DPRegisterData; // sf @@ -131,7 +131,7 @@ word dpr(a64inst_instruction cI) { return out; } -word sts(a64inst_instruction cI) { +word assembleSTS(a64inst_instruction cI) { a64inst_SingleTransferData data = cI.data.SingleTransferData; word out = 0; a64inst_SingleDataTransferData data2 = data.processOpData.singleDataTransferData; @@ -166,7 +166,7 @@ word sts(a64inst_instruction cI) { return out; } -word ldl(a64inst_instruction cI) { +word assembleLDL(a64inst_instruction cI) { word out = 3*(2^27); a64inst_SingleTransferData data = cI.data.SingleTransferData; int sf = data.regType; From 1fa33798bfe7e62f878d0fc6e81e02b5be56a7d7 Mon Sep 17 00:00:00 2001 From: EDiasAlberto Date: Thu, 6 Jun 2024 17:38:54 +0100 Subject: [PATCH 2/3] rewrite DP classification logic --- src/parser.c | 49 ++++++++++++++++++++++++++++++------------------- 1 file changed, 30 insertions(+), 19 deletions(-) diff --git a/src/parser.c b/src/parser.c index 8b98cb0..3296dac 100644 --- a/src/parser.c +++ b/src/parser.c @@ -1,5 +1,6 @@ #include #include +#include #include "parser.h" #include "a64instruction.h" @@ -25,23 +26,23 @@ void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[]){ } else if( (strcmp(operandList[2][strlen(operandList[1])-1], "x") == 0) || (strcmp(operandList[2][strlen(operandList[1])-1], "w") == 0)){ //register - instr->data.processOpData.addressingMode = a64inst_REGISTER_OFFSET; + instr->data.SingleTransferData.singleDataTransferData.processOpData.addressingMode = a64inst_REGISTER_OFFSET; } else { instr->data.processOpData.addressingMode = a64inst_UNSIGNED_OFFSET; } } void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[]){ - switch(instr->data.type){ + switch(instr->type){ case a64inst_SINGLETRANSFER: if(strcmp(operandList[0][0], "x")==0){ //x-register - instr->data.regType = 1; + instr->data.SingleTransferData.regType = 1; } else { - instr->data.regType = 0; + instr->data.SingleTransferData.regType = 0; } char *endptr; - instr->data.target = strtol(operandList[0][0]+1, endptr, 2); + instr->data.SingleTransferData.target = strtol(operandList[0][0]+1, endptr, 2); calcluateAddressFormat(instr, operandList); break; case a64inst_LOADLITERAL: @@ -51,38 +52,48 @@ void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *o } void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *operandList[]){ - switch(instr->data.BranchType){ + switch(instr->data.BranchData.BranchType){ case a64inst_UNCONDITIONAL: //define and sign extend immediate offset //use symbol table break; case a64inst_REGISTER: char *endptr; - instr->data.processOpData.src = strtol(operandList[0] + 1, endptr, 2) + instr->data.BranchData.processOpData.src = strtol(operandList[0] + 1, endptr, 2) break; case a64inst_CONDITIONAL: char* condition = strtok(strdup(opcode), "b."); condition = strtok(NULL, ""); if(strcmp(condition, "eq")==0){ - instr->data.processOpData.cond = EQ; + instr->data.branchData.processOpData.cond = EQ; } else if (strcmp(condition, "ne")==0){ - instr->data.processOpData.cond = NE; + instr->data.branchData.processOpData.cond = NE; } else if (strcmp(condition, "ge")==0){ - instr->data.processOpData.cond = GE; + instr->data.branchData.processOpData.cond = GE; } else if (strcmp(condition, "lt")==0){ - instr->data.processOpData.cond = LT; + instr->data.branchData.processOpData.cond = LT; } else if (strcmp(condition, "gt")==0){ - instr->data.processOpData.cond = GT; + instr->data.branchData.processOpData.cond = GT; } else if (strcmp(condition, "le")==0){ - instr->data.processOpData.cond = LE; + instr->data.branchData.processOpData.cond = LE; } else if (srtcmp(condition, "al")==0){ - instr->data.processOpData.cond = AL; + instr->data.branchData.processOpData.cond = AL; } break; //calculate offset from symbol table. } } +int isOperandRegister(char *operand){ + return((strcmp(operand[0], "x")==0) || (strcmp(operand[0], "w")==0)); +} + +int classifyDPInst(char *operandList[]){ + return(isOperandRegister(operandList[0]) && + isOperandRegister(operandList[1]) && + isOperandRegister(operandList[2])); +} + void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[]){ int isUnconditional = strcmp(opcode, "b"); int isRegister = strcmp(opcode, "br"); @@ -108,11 +119,11 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[ if( *address == '['){ //type is register instr->type = a64inst_SINGLETRANSFER; - instr->data.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER; + instr->data.singleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER; if(isLoad == 0){ - instr->data.processOpData.transferType = a64inst_LOAD; + instr->data.SingleTransferData.transferType = a64inst_LOAD; } else { - instr->data.processOpData.transferType = a64inst_STORE; + instr->data.SingleTransferData.processOpData.transferType = a64inst_STORE; } } else { instr->type = a64inst_LOADLITERAL; @@ -121,7 +132,7 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[ } else { int numOperands = sizeof(operandList) / sizeof(operandList[0]) - if(numOperands==3){ + if(classifyDPInst(operandList)){ instr->type = a64inst_DPREGISTER; } else { instr->type = a64inst_DPIMMEDIATE; @@ -172,7 +183,7 @@ a64inst_instruction *parser(char asmLine[]){ instr->type = a64inst_LABEL; char *opcodeCpy = strdup(opcode); char *labelData = strtok(opcodeCpy, ":"); - instr->data.label = labelData; + instr->data.labelData.label = labelData; } else { //type is instruction int operandCount = 0; From 34060c3fad86449822591cbd48e57d3b4fac5c08 Mon Sep 17 00:00:00 2001 From: EDiasAlberto Date: Thu, 6 Jun 2024 17:54:35 +0100 Subject: [PATCH 3/3] fix hierarchy of struct access in parser --- src/parser.c | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/src/parser.c b/src/parser.c index 3296dac..1bcf31e 100644 --- a/src/parser.c +++ b/src/parser.c @@ -14,21 +14,22 @@ // - match opcode to a64 struct types (DONE) // - count operands and match type/values // - generate final a64inst and return +// - CREATE FUNC TO TIDY UP OPERANDS IN DP //calculate offsets from string void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[]){ if(strcmp(operandList[2][strlen(operandList[1])-1], "!")==0){ - instr->data.processOpData.addressingMode = a64inst_PRE_INDEXED; + instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_PRE_INDEXED; } else if(strcmp(operandList[1][strlen(operandList[0])-1], "]") == 0) { //post-indexed - instr->data.processOpData.addressingMode = a64inst_POST_INDEXED; + instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_POST_INDEXED; } else if( (strcmp(operandList[2][strlen(operandList[1])-1], "x") == 0) || (strcmp(operandList[2][strlen(operandList[1])-1], "w") == 0)){ //register - instr->data.SingleTransferData.singleDataTransferData.processOpData.addressingMode = a64inst_REGISTER_OFFSET; + instr->data.SingleTransferData.processOpData.singleDataTransferData.processOpData.addressingMode = a64inst_REGISTER_OFFSET; } else { - instr->data.processOpData.addressingMode = a64inst_UNSIGNED_OFFSET; + instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_UNSIGNED_OFFSET; } } @@ -59,25 +60,25 @@ void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *oper break; case a64inst_REGISTER: char *endptr; - instr->data.BranchData.processOpData.src = strtol(operandList[0] + 1, endptr, 2) + instr->data.BranchData.processOpData.registerData.src = strtol(operandList[0] + 1, endptr, 2) break; case a64inst_CONDITIONAL: char* condition = strtok(strdup(opcode), "b."); condition = strtok(NULL, ""); if(strcmp(condition, "eq")==0){ - instr->data.branchData.processOpData.cond = EQ; + instr->data.branchData.processOpData.conditionalData.cond = EQ; } else if (strcmp(condition, "ne")==0){ - instr->data.branchData.processOpData.cond = NE; + instr->data.branchData.processOpData.conditionalData.cond = NE; } else if (strcmp(condition, "ge")==0){ - instr->data.branchData.processOpData.cond = GE; + instr->data.branchData.processOpData.conditionalData.cond = GE; } else if (strcmp(condition, "lt")==0){ - instr->data.branchData.processOpData.cond = LT; + instr->data.branchData.processOpData.conditionalData.cond = LT; } else if (strcmp(condition, "gt")==0){ - instr->data.branchData.processOpData.cond = GT; + instr->data.branchData.processOpData.conditionalData.cond = GT; } else if (strcmp(condition, "le")==0){ - instr->data.branchData.processOpData.cond = LE; + instr->data.branchData.processOpData.conditionalData.cond = LE; } else if (srtcmp(condition, "al")==0){ - instr->data.branchData.processOpData.cond = AL; + instr->data.branchData.processOpData.conditionalData.cond = AL; } break; //calculate offset from symbol table.