fix loadreg struct construction
This commit is contained in:
parent
5221189304
commit
344f455be3
44
src/parser.c
44
src/parser.c
@ -28,25 +28,28 @@ int getOperandNumber(char *operand){
|
|||||||
return number;
|
return number;
|
||||||
}
|
}
|
||||||
|
|
||||||
int isOperandRegister(char *operand){
|
int isOperandRegister(char regStartChar){
|
||||||
return((strcmp(&(operand[0]), "x")==0) || (strcmp(&(operand[0]), "w")==0));
|
return((regStartChar == 'x') || (regStartChar == 'w'));
|
||||||
}
|
}
|
||||||
|
|
||||||
//calculate offsets from string
|
//calculate offsets from string
|
||||||
void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], int numOperands){
|
void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], int numOperands){
|
||||||
char *endptr;
|
char *endptr;
|
||||||
uint8_t base = strtol(&(operandList[1][2]), &endptr, 10);
|
char baseRegParam[strlen(operandList[1])];
|
||||||
|
strcpy(baseRegParam, operandList[1]);
|
||||||
|
char *startptr = &baseRegParam[1];
|
||||||
|
int base = getOperandNumber(startptr);
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.base = base;
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.base = base;
|
||||||
|
|
||||||
if(strcmp(&(operandList[2][strlen(operandList[1])-1]), "!")==0){
|
if(operandList[2][strlen(operandList[2])-1] == '!'){
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_PRE_INDEXED;
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_PRE_INDEXED;
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
|
||||||
} else if(strcmp(&(operandList[1][strlen(operandList[0])-1]), "]") == 0) {
|
} else if(operandList[1][strlen(operandList[1])-1] == ']') {
|
||||||
//post-indexed
|
//post-indexed
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_POST_INDEXED;
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_POST_INDEXED;
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
|
||||||
} else if( (isOperandRegister(&(operandList[2][0])) == 1)
|
} else if( (isOperandRegister(operandList[1][0]) == 1)
|
||||||
|| (isOperandRegister(&(operandList[2][0])) == 1)){
|
|| (isOperandRegister(operandList[2][0]) == 1)){
|
||||||
//register
|
//register
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_REGISTER_OFFSET;
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_REGISTER_OFFSET;
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.offsetReg = strtol(&(operandList[2][1]), &endptr, 10);
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.offsetReg = strtol(&(operandList[2][1]), &endptr, 10);
|
||||||
@ -65,16 +68,16 @@ void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], in
|
|||||||
|
|
||||||
void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[], int numOperands){
|
void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[], int numOperands){
|
||||||
switch(instr->type){
|
switch(instr->type){
|
||||||
case a64inst_SINGLETRANSFER:
|
case a64inst_SINGLETRANSFER: {
|
||||||
if(strcmp(&(operandList[0][0]), "x")==0){
|
if(operandList[0][0] == 'x'){
|
||||||
//x-register
|
//x-register
|
||||||
instr->data.SingleTransferData.regType = 1;
|
instr->data.SingleTransferData.regType = 1;
|
||||||
} else {
|
} else {
|
||||||
instr->data.SingleTransferData.regType = 0;
|
instr->data.SingleTransferData.regType = 0;
|
||||||
}
|
}
|
||||||
char *endptr;
|
instr->data.SingleTransferData.target = getOperandNumber(operandList[0]);
|
||||||
instr->data.SingleTransferData.target = strtol(&(operandList[0][0])+1, &endptr, 10);
|
|
||||||
break;
|
break;
|
||||||
|
}
|
||||||
case a64inst_LOADLITERAL:
|
case a64inst_LOADLITERAL:
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
@ -120,9 +123,9 @@ void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *oper
|
|||||||
}
|
}
|
||||||
|
|
||||||
int classifyDPInst(char *operandList[]){
|
int classifyDPInst(char *operandList[]){
|
||||||
return(isOperandRegister(operandList[0]) &&
|
return(isOperandRegister(operandList[0][0]) &&
|
||||||
isOperandRegister(operandList[1]) &&
|
isOperandRegister(operandList[1][0]) &&
|
||||||
isOperandRegister(operandList[2]));
|
isOperandRegister(operandList[2][0]));
|
||||||
}
|
}
|
||||||
|
|
||||||
void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[], int numOperands){
|
void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[], int numOperands){
|
||||||
@ -144,15 +147,14 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
|
|||||||
}
|
}
|
||||||
} else if(isLoad == 0 || isStore == 0){
|
} else if(isLoad == 0 || isStore == 0){
|
||||||
//loading/storing instruction; classify operands
|
//loading/storing instruction; classify operands
|
||||||
char *address = operandList[1];
|
if( operandList[1][0] == '['){
|
||||||
if( *address == '['){
|
|
||||||
//type is register
|
//type is register
|
||||||
instr->type = a64inst_SINGLETRANSFER;
|
instr->type = a64inst_SINGLETRANSFER;
|
||||||
instr->data.SingleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER;
|
instr->data.SingleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER;
|
||||||
if(isLoad == 0){
|
if(isLoad == 0){
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
|
|
||||||
} else {
|
|
||||||
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_STORE;
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_STORE;
|
||||||
|
} else {
|
||||||
|
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
|
||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
instr->type = a64inst_LOADLITERAL;
|
instr->type = a64inst_LOADLITERAL;
|
||||||
@ -177,7 +179,8 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
|
|||||||
|
|
||||||
void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOperands){
|
void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOperands){
|
||||||
assert(str != NULL);
|
assert(str != NULL);
|
||||||
char operandsDupe[strlen(str)+1];
|
char *operandsDupe = malloc(strlen(str)+1);
|
||||||
|
assert(operandsDupe != NULL);
|
||||||
strcpy(operandsDupe, str);
|
strcpy(operandsDupe, str);
|
||||||
char *operand = strtok(operandsDupe, OPERAND_DELIMITER);
|
char *operand = strtok(operandsDupe, OPERAND_DELIMITER);
|
||||||
operands[0] = operand;
|
operands[0] = operand;
|
||||||
@ -193,6 +196,7 @@ void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOp
|
|||||||
//takes inputted assembly line and returns a
|
//takes inputted assembly line and returns a
|
||||||
//pointer to an abstract representation of the instruction
|
//pointer to an abstract representation of the instruction
|
||||||
void parser_instruction(char asmLine[], a64inst_instruction *instr) {
|
void parser_instruction(char asmLine[], a64inst_instruction *instr) {
|
||||||
|
printf("%s", asmLine);
|
||||||
int numOperands = 0;
|
int numOperands = 0;
|
||||||
if (instr == NULL){
|
if (instr == NULL){
|
||||||
exit(EXIT_FAILURE);
|
exit(EXIT_FAILURE);
|
||||||
@ -205,6 +209,7 @@ void parser_instruction(char asmLine[], a64inst_instruction *instr) {
|
|||||||
|
|
||||||
//"opcode operand1, {operand2}, ..."
|
//"opcode operand1, {operand2}, ..."
|
||||||
//duplicated as strtok modifies the input string
|
//duplicated as strtok modifies the input string
|
||||||
|
|
||||||
char stringptr[strlen(asmLine) + 1];
|
char stringptr[strlen(asmLine) + 1];
|
||||||
strcpy(stringptr, asmLine);
|
strcpy(stringptr, asmLine);
|
||||||
char *token;
|
char *token;
|
||||||
@ -236,6 +241,7 @@ void parser_instruction(char asmLine[], a64inst_instruction *instr) {
|
|||||||
//categorise instruction type from opcode and operands
|
//categorise instruction type from opcode and operands
|
||||||
classifyOpcode(opcode, instr, operandList, operandCount);
|
classifyOpcode(opcode, instr, operandList, operandCount);
|
||||||
//define struct values according to operands and type
|
//define struct values according to operands and type
|
||||||
|
printf("got to here");
|
||||||
switch(instr->type){
|
switch(instr->type){
|
||||||
case a64inst_BRANCH:
|
case a64inst_BRANCH:
|
||||||
generateBranchOperands(instr, opcode, operandList);
|
generateBranchOperands(instr, opcode, operandList);
|
||||||
|
|||||||
@ -145,11 +145,11 @@ word sts(a64inst_instruction cI) {
|
|||||||
int rt = data.target;
|
int rt = data.target;
|
||||||
switch (data2.addressingMode) {
|
switch (data2.addressingMode) {
|
||||||
// register offset
|
// register offset
|
||||||
case 2:
|
case a64inst_REGISTER_OFFSET:
|
||||||
offset += 2074 + 64 * data2.a64inst_addressingModeData.offsetReg;
|
offset += 2080 + 64 * data2.a64inst_addressingModeData.offsetReg;
|
||||||
break;
|
break;
|
||||||
// unsigned offset
|
// unsigned offset
|
||||||
case 3:
|
case a64inst_UNSIGNED_OFFSET:
|
||||||
offset += data2.a64inst_addressingModeData.unsignedOffset;
|
offset += data2.a64inst_addressingModeData.unsignedOffset;
|
||||||
u = 1;
|
u = 1;
|
||||||
break;
|
break;
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user