fix loadreg struct construction

This commit is contained in:
EDiasAlberto 2024-06-12 19:25:05 +01:00
parent 5221189304
commit 344f455be3
2 changed files with 28 additions and 22 deletions

View File

@ -28,25 +28,28 @@ int getOperandNumber(char *operand){
return number;
}
int isOperandRegister(char *operand){
return((strcmp(&(operand[0]), "x")==0) || (strcmp(&(operand[0]), "w")==0));
int isOperandRegister(char regStartChar){
return((regStartChar == 'x') || (regStartChar == 'w'));
}
//calculate offsets from string
void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], int numOperands){
char *endptr;
uint8_t base = strtol(&(operandList[1][2]), &endptr, 10);
char baseRegParam[strlen(operandList[1])];
strcpy(baseRegParam, operandList[1]);
char *startptr = &baseRegParam[1];
int base = getOperandNumber(startptr);
instr->data.SingleTransferData.processOpData.singleDataTransferData.base = base;
if(strcmp(&(operandList[2][strlen(operandList[1])-1]), "!")==0){
if(operandList[2][strlen(operandList[2])-1] == '!'){
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_PRE_INDEXED;
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
} else if(strcmp(&(operandList[1][strlen(operandList[0])-1]), "]") == 0) {
} else if(operandList[1][strlen(operandList[1])-1] == ']') {
//post-indexed
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_POST_INDEXED;
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
} else if( (isOperandRegister(&(operandList[2][0])) == 1)
|| (isOperandRegister(&(operandList[2][0])) == 1)){
} else if( (isOperandRegister(operandList[1][0]) == 1)
|| (isOperandRegister(operandList[2][0]) == 1)){
//register
instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_REGISTER_OFFSET;
instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.offsetReg = strtol(&(operandList[2][1]), &endptr, 10);
@ -65,16 +68,16 @@ void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], in
void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[], int numOperands){
switch(instr->type){
case a64inst_SINGLETRANSFER:
if(strcmp(&(operandList[0][0]), "x")==0){
case a64inst_SINGLETRANSFER: {
if(operandList[0][0] == 'x'){
//x-register
instr->data.SingleTransferData.regType = 1;
} else {
instr->data.SingleTransferData.regType = 0;
}
char *endptr;
instr->data.SingleTransferData.target = strtol(&(operandList[0][0])+1, &endptr, 10);
instr->data.SingleTransferData.target = getOperandNumber(operandList[0]);
break;
}
case a64inst_LOADLITERAL:
break;
default:
@ -120,9 +123,9 @@ void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *oper
}
int classifyDPInst(char *operandList[]){
return(isOperandRegister(operandList[0]) &&
isOperandRegister(operandList[1]) &&
isOperandRegister(operandList[2]));
return(isOperandRegister(operandList[0][0]) &&
isOperandRegister(operandList[1][0]) &&
isOperandRegister(operandList[2][0]));
}
void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[], int numOperands){
@ -144,15 +147,14 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
}
} else if(isLoad == 0 || isStore == 0){
//loading/storing instruction; classify operands
char *address = operandList[1];
if( *address == '['){
if( operandList[1][0] == '['){
//type is register
instr->type = a64inst_SINGLETRANSFER;
instr->data.SingleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER;
if(isLoad == 0){
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
} else {
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_STORE;
} else {
instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
}
} else {
instr->type = a64inst_LOADLITERAL;
@ -177,7 +179,8 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOperands){
assert(str != NULL);
char operandsDupe[strlen(str)+1];
char *operandsDupe = malloc(strlen(str)+1);
assert(operandsDupe != NULL);
strcpy(operandsDupe, str);
char *operand = strtok(operandsDupe, OPERAND_DELIMITER);
operands[0] = operand;
@ -193,6 +196,7 @@ void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOp
//takes inputted assembly line and returns a
//pointer to an abstract representation of the instruction
void parser_instruction(char asmLine[], a64inst_instruction *instr) {
printf("%s", asmLine);
int numOperands = 0;
if (instr == NULL){
exit(EXIT_FAILURE);
@ -205,6 +209,7 @@ void parser_instruction(char asmLine[], a64inst_instruction *instr) {
//"opcode operand1, {operand2}, ..."
//duplicated as strtok modifies the input string
char stringptr[strlen(asmLine) + 1];
strcpy(stringptr, asmLine);
char *token;
@ -236,6 +241,7 @@ void parser_instruction(char asmLine[], a64inst_instruction *instr) {
//categorise instruction type from opcode and operands
classifyOpcode(opcode, instr, operandList, operandCount);
//define struct values according to operands and type
printf("got to here");
switch(instr->type){
case a64inst_BRANCH:
generateBranchOperands(instr, opcode, operandList);

View File

@ -145,11 +145,11 @@ word sts(a64inst_instruction cI) {
int rt = data.target;
switch (data2.addressingMode) {
// register offset
case 2:
offset += 2074 + 64 * data2.a64inst_addressingModeData.offsetReg;
case a64inst_REGISTER_OFFSET:
offset += 2080 + 64 * data2.a64inst_addressingModeData.offsetReg;
break;
// unsigned offset
case 3:
case a64inst_UNSIGNED_OFFSET:
offset += data2.a64inst_addressingModeData.unsignedOffset;
u = 1;
break;