fix loadreg struct construction
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parent
5221189304
commit
344f455be3
44
src/parser.c
44
src/parser.c
@ -28,25 +28,28 @@ int getOperandNumber(char *operand){
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return number;
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}
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int isOperandRegister(char *operand){
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return((strcmp(&(operand[0]), "x")==0) || (strcmp(&(operand[0]), "w")==0));
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int isOperandRegister(char regStartChar){
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return((regStartChar == 'x') || (regStartChar == 'w'));
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}
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//calculate offsets from string
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void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], int numOperands){
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char *endptr;
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uint8_t base = strtol(&(operandList[1][2]), &endptr, 10);
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char baseRegParam[strlen(operandList[1])];
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strcpy(baseRegParam, operandList[1]);
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char *startptr = &baseRegParam[1];
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int base = getOperandNumber(startptr);
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instr->data.SingleTransferData.processOpData.singleDataTransferData.base = base;
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if(strcmp(&(operandList[2][strlen(operandList[1])-1]), "!")==0){
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if(operandList[2][strlen(operandList[2])-1] == '!'){
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_PRE_INDEXED;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
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} else if(strcmp(&(operandList[1][strlen(operandList[0])-1]), "]") == 0) {
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} else if(operandList[1][strlen(operandList[1])-1] == ']') {
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//post-indexed
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_POST_INDEXED;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.indexedOffset = strtol(&(operandList[2][1]), &endptr, 10);
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} else if( (isOperandRegister(&(operandList[2][0])) == 1)
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|| (isOperandRegister(&(operandList[2][0])) == 1)){
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} else if( (isOperandRegister(operandList[1][0]) == 1)
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|| (isOperandRegister(operandList[2][0]) == 1)){
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//register
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instr->data.SingleTransferData.processOpData.singleDataTransferData.addressingMode = a64inst_REGISTER_OFFSET;
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instr->data.SingleTransferData.processOpData.singleDataTransferData.a64inst_addressingModeData.offsetReg = strtol(&(operandList[2][1]), &endptr, 10);
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@ -65,16 +68,16 @@ void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[], in
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void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[], int numOperands){
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switch(instr->type){
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case a64inst_SINGLETRANSFER:
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if(strcmp(&(operandList[0][0]), "x")==0){
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case a64inst_SINGLETRANSFER: {
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if(operandList[0][0] == 'x'){
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//x-register
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instr->data.SingleTransferData.regType = 1;
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} else {
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instr->data.SingleTransferData.regType = 0;
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}
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char *endptr;
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instr->data.SingleTransferData.target = strtol(&(operandList[0][0])+1, &endptr, 10);
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instr->data.SingleTransferData.target = getOperandNumber(operandList[0]);
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break;
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}
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case a64inst_LOADLITERAL:
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break;
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default:
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@ -120,9 +123,9 @@ void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *oper
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}
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int classifyDPInst(char *operandList[]){
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return(isOperandRegister(operandList[0]) &&
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isOperandRegister(operandList[1]) &&
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isOperandRegister(operandList[2]));
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return(isOperandRegister(operandList[0][0]) &&
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isOperandRegister(operandList[1][0]) &&
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isOperandRegister(operandList[2][0]));
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}
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void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[], int numOperands){
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@ -144,15 +147,14 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
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}
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} else if(isLoad == 0 || isStore == 0){
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//loading/storing instruction; classify operands
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char *address = operandList[1];
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if( *address == '['){
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if( operandList[1][0] == '['){
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//type is register
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instr->type = a64inst_SINGLETRANSFER;
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instr->data.SingleTransferData.SingleTransferOpType = a64inst_SINGLE_TRANSFER_SINGLE_DATA_TRANSFER;
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if(isLoad == 0){
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instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
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} else {
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instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_STORE;
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} else {
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instr->data.SingleTransferData.processOpData.singleDataTransferData.transferType = a64inst_LOAD;
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}
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} else {
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instr->type = a64inst_LOADLITERAL;
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@ -177,7 +179,8 @@ void classifyOpcode(char* opcode, a64inst_instruction *instr, char *operandList[
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void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOperands){
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assert(str != NULL);
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char operandsDupe[strlen(str)+1];
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char *operandsDupe = malloc(strlen(str)+1);
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assert(operandsDupe != NULL);
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strcpy(operandsDupe, str);
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char *operand = strtok(operandsDupe, OPERAND_DELIMITER);
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operands[0] = operand;
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@ -193,6 +196,7 @@ void tokeniseOperands(char* str, int *operandCount, char *operands[], int *numOp
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//takes inputted assembly line and returns a
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//pointer to an abstract representation of the instruction
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void parser_instruction(char asmLine[], a64inst_instruction *instr) {
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printf("%s", asmLine);
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int numOperands = 0;
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if (instr == NULL){
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exit(EXIT_FAILURE);
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@ -205,6 +209,7 @@ void parser_instruction(char asmLine[], a64inst_instruction *instr) {
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//"opcode operand1, {operand2}, ..."
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//duplicated as strtok modifies the input string
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char stringptr[strlen(asmLine) + 1];
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strcpy(stringptr, asmLine);
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char *token;
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@ -236,6 +241,7 @@ void parser_instruction(char asmLine[], a64inst_instruction *instr) {
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//categorise instruction type from opcode and operands
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classifyOpcode(opcode, instr, operandList, operandCount);
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//define struct values according to operands and type
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printf("got to here");
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switch(instr->type){
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case a64inst_BRANCH:
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generateBranchOperands(instr, opcode, operandList);
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@ -145,11 +145,11 @@ word sts(a64inst_instruction cI) {
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int rt = data.target;
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switch (data2.addressingMode) {
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// register offset
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case 2:
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offset += 2074 + 64 * data2.a64inst_addressingModeData.offsetReg;
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case a64inst_REGISTER_OFFSET:
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offset += 2080 + 64 * data2.a64inst_addressingModeData.offsetReg;
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break;
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// unsigned offset
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case 3:
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case a64inst_UNSIGNED_OFFSET:
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offset += data2.a64inst_addressingModeData.unsignedOffset;
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u = 1;
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break;
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