Change name and signature of helper functions to be consistent w/ S
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64a9d72806
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@ -17,8 +17,8 @@
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#define DPI_WIDEMOV_SHIFT 16
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// Prototypes
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void execute_SDT(Machine *state, a64inst_instruction *inst);
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void execute_Branch(Machine *state, a64inst_instruction *inst);
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static void executeSDT(Machine *state, a64inst_instruction *inst);
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static void executeBranch(Machine *state, a64inst_instruction *inst);
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static void executeDPImmediate(Machine *state, a64inst_instruction *inst);
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static void executeDPRegister(Machine *state, a64inst_instruction *inst);
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@ -37,7 +37,7 @@ void execute(Machine *state, a64inst_instruction *inst) {
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// Execute a branch instruction
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case a64inst_BRANCH:
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execute_Branch(state, inst);
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executeBranch(state, inst);
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break;
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// Execute a data processing register instruction
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@ -46,7 +46,7 @@ void execute(Machine *state, a64inst_instruction *inst) {
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break;
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case a64inst_SINGLETRANSFER:
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execute_SDT(state, inst);
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executeSDT(state, inst);
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break;
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// Unknown instruction
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@ -289,7 +289,7 @@ static void executeDPRegister(Machine *state, a64inst_instruction *inst) {
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}
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}
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void execute_SDT(Machine *state, a64inst_instruction *inst) {
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static void executeSDT(Machine *state, a64inst_instruction *inst) {
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word address;
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bool isLoad;
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if (inst->data.SingleTransferData.SingleTransferOpType == a64inst_SINGLE_TRANSFER_LOAD_LITERAL) {
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@ -359,7 +359,7 @@ static bool isConditionMet(Machine* state, a64inst_ConditionType cond) {
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}
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}
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void execute_Branch(Machine *state, a64inst_instruction *inst) {
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static void executeBranch(Machine *state, a64inst_instruction *inst) {
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switch (inst->data.BranchData.BranchType) {
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case a64inst_UNCONDITIONAL:
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state->pc += signExtend(inst->data.BranchData.processOpData.unconditionalData.unconditionalOffset * 4, 26);
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