classify load store addressing type
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parent
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commit
1011d7be71
30
src/parser.c
30
src/parser.c
@ -14,6 +14,36 @@
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// - count operands and match type/values
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// - count operands and match type/values
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// - generate final a64inst and return
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// - generate final a64inst and return
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void calcluateAddressFormat(a64inst_instruction *instr, char *operandList[]){
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if(strcmp(operandList[0][strlen(operandList[0])-1], "{") == 0) {
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//unsigned immediate offset
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instr->data.processOpData.addressingMode = a64inst_UNSIGNED_OFFSET;
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} else if(strcmp(operandList[0][strlen(operandList[0])-1], "]") == 0) {
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//post-indexed
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instr->data.processOpData.addressingMode = a64inst_POST_INDEXED;
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} else {
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//check second operand to distinguish between pre-indexed and register
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if(strcmp(operandList[1][0], "#")==0){
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//pre-indexed
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instr->data.processOpData.addressingMode = a64inst_PRE_INDEXED;
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} else {
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//register
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instr->data.processOpData.addressingMode = a64inst_REGISTER_OFFSET;
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}
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}
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}
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void generateLoadStoreOperands(a64inst_instruction *instr, char *opcode, char *operandList[]){
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switch(instr->data.type){
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case a64inst_SINGLETRANSFER:
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calcluateAddressFormat(instr, operandList);
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break;
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case a64inst_LOADLITERAL:
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break;
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}
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}
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void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *operandList[]){
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void generateBranchOperands(a64inst_instruction *instr, char* opcode, char *operandList[]){
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switch(instr->data.BranchType){
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switch(instr->data.BranchType){
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case a64inst_UNCONDITIONAL:
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case a64inst_UNCONDITIONAL:
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